Nvidia Unveils Vera CPU Architecture with Custom Olympus Cores for Agentic AI

Nvidia has disclosed new architectural details for its upcoming Vera data center CPU, showcasing its custom-designed “Olympus” cores built specifically to handle the demands of agentic artificial intelligence. Part of the company’s next-generation Vera Rubin platform, the Arm-based processor is engineered to manage complex reasoning, autonomous task planning, and code generation—tasks that increasingly require robust single-core CPU performance alongside traditional GPU acceleration.

According to internal benchmark data released by Nvidia, the Vera CPU delivers up to 1.8 times the single-core performance of AMD‘s flagship Epyc Turin 9755 processor in specific workloads, such as Python-based execution tests (714.cpython_r) from the SPEC CPU 2026 suite. While these internal results have not yet been independently verified, they highlight Nvidia’s aggressive push to challenge established x86 server dominant players in the high-performance computing space.

The shift toward “agentic AI“—where software agents autonomously execute multi-step workflows, call external tools, and write code—presents a unique computational challenge. Unlike standard deep learning models that rely almost exclusively on parallel GPU matrix multiplication, agentic workflows require fast sequential processing, branch prediction, and low-latency memory access. This has forced hardware designers to rethink CPU architectures for the AI era.

To address these workloads, each Vera CPU features 88 custom Olympus cores and 176 physical threads on a monolithic compute die. The architecture utilizes a wide front-end with a 10-wide decode engine capable of processing up to ten fused instructions per cycle, supported by a high-bandwidth instruction fetch of up to 16 instructions per cycle. To minimize latency, Nvidia has integrated a neural branch predictor designed to reduce wrong-path execution during complex decision-making algorithms.

The memory subsystem is built around Nvidia’s Spatial Multithreading technology and the Scalable Coherency Fabric, which provides 3.4 TB/s of on-die core-to-core bandwidth. The processor supports up to 1.5 TB of SOCAMM2 LPDDR5X memory, delivering 1.2 TB/s of aggregate memory bandwidth. For high-speed interconnectivity, the chip supports NVLink-C2C, PCIe Gen 6.4, and CXL 3.1, offering up to 1.8 TB/s of external bandwidth.

For larger enterprise deployments, Vera supports dual-socket configurations. To prevent the memory fragmentation and latency issues common in multi-socket systems, Nvidia employs a software-defined approach where each physical socket is presented as a single Non-Uniform Memory Access (NUMA) domain. This creates a clean two-node NUMA topology, optimizing data flow between the processors.

Nvidia’s transition to custom Arm-based silicon with the Vera CPU follows the trajectory set by its Grace CPU, which was paired with Hopper GPUs in the GH200 Grace Hopper Superchip. By designing its own CPU cores rather than relying on standard Arm Neoverse designs, Nvidia joins other tech giants tailoring silicon for specific cloud and AI workloads.